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Features
General
* * * * * * * High-performance, Low-power secureAVR Enhanced RISC Architecture
- 137 Powerful Instructions (Most Executed in a Single Clock Cycle) Low Power Idle and Power-down Modes Bond Pad Locations Conforming to ISO 7816-2 ESD Protection to 6000V Operating Ranges: 2.7V to 5.5V Compliant with ICAO and FIPS201 Specifications, GSM and EMV2000 Specifications Available in Wafers, Contact Modules, Dual Interface Modules, Full Contactless Modules or Inlays and Industry-standard Packages
Contactless Mode
* * * * * * *
RF Contactless Interface with Full Support for ISO/IEC 14443 Type A and B Protocols Supply Voltage Clamp and Regulation Full-bridge Power Rectification On-chip Tuning Capacitance: 10 pF up to 120 pF 13.56 MHz Clock Extraction Internal Bus Maximum Frequency: 3.4 MHz (External clock) or 40MHz (Internal clock) Reader-to-card: - ISO/IEC Type A: 100% ASK Modulation and Modified Miller Bit Coding - ISO/IEC Type B: 10% ASK Modulation and NRZ Bit Coding * Card-to-reader: - ISO/IEC Type A: Generation of 847.5Khz Subcarrier with OOK Modulation and Manchester Bit Coding - ISO/IEC Type B: Modulation of Incoming RF Carrier by Resistive Load Switching / Generation of 847.5Khz Subcarrier with BPSK Modulation / NRZ Data Encoding * Baud Rates: Up to 848 kbps * RF Frame: Up to 256 Bytes
Secure Microcontroller for Smart Cards AT90SC 256144RCFT Summary
Memory
* 256K Bytes of ROM Program Memory * 32K Bytes of ROM Dedicated to ATMEL's Cryptographic Libraries * 144K Bytes of EEPROM, Including 128 OTP Bytes and 384-byte Bit-addressable Bytes
- 1 to 128-byte Program / Erase - 1ms Program / 1ms Erase - Typically 500,000 Write/Erase Cycles at a Temperature of 25oC - 10 Years Data Retention * 8K Bytes of RAM + 256 Bytes of DMA Dedicated RAM
Peripherals
* Interrupt Driven ISO14443 Contactless Controller with Transmit / Receive * One ISO 7816 Controller * * * * * * * *
- Up to 625 kbps at 5 MHz - Compliant with T=0 and T=1 Protocols One I/O Port Programmable Internal Oscillator (Up to 40 MHz for AdvX and up to 20 MHz for Internal CPU Clock) Three 16-bit Timers (Watchdog capability) Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller Hardware DES and Triple DES DPA/SPA/DEMA Resistant Checksum Accelerator CRC16 & 32 Engine (Compliant with ISO/IEC 3309)
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Note: This is a summary document. A complete document will be available under NDA. For more information, please contact your local Atmel sales office.
* 32-bit AdvX Cryptographic Accelerator for Public Key Operations with GF92n) Multiplier and Firmware (RSA, DSA, ECC, Key
Generation, AES, MD5, SHA-1, SHA-256)
* DMA Controller to Speed-up Data Transfers when communicating via the Contactless Interface * EAES 128 Engine (Optional)
Security
* * * * * * * * *
Dedicated Hardware for Protection Against SPA/DPA/SEMA/DEMA Attacks Advanced Protection Against Physical Attack, Including Active Shield Environmental Protection Systems Voltage Monitor Frequency Monitor Light protection Temperature Monitor Secure Memory Management/Access Protection (Supervisor Mode) Designed to meet Common Criteria EAL5+
Development Tools
* Voyager Emulation Platform (ATV4 Advanced) to Support Software Development * IAR Embedded Workbench AVR(R) V3.20c Debugger or Atmel's AVR Studio(R) Version 4.07 or Above * Software Libraries and Application Notes
Description
The AT90SC256144RCFT is a low-power, high-performance, 8-/16-bit microcontroller with ROM program memory, EEPROM data memor y, based on the secureAVR enhanced RISC architecture and with a dual interface (contact+contactless). By executing powerful instructions in a single clock cycle, the AT90SC256144RCFT achieves throughputs close to 1 MIPS per MHz. Its Harvard architecture includes 32 general-purpose working registers directly connected to the ALU, allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The AT90SC256144RCFT uses the secureAVR architecture that allows the linear addressing of up to 8M bytes of code and up to 16M bytes of data as well as a number of new functional and security features. The AT90SC256144RCFT features 144K bytes of high-performance EEPROM (fast erase/write time, high endurance).This allows system developers to offer their customers a true 128K bytes EEPROM, while still being able to use the remaining 16K bytes for their own purposes (customization and patches, for example). The ability to map the EEPROM in the code space allows parts of the program memory to be reprogrammed in-system. The cryptographic accelerator featured in the AT90SC256144RCFT is the new AdvX, a N-bit multiplier-accumulator dedicated to performing fast encryption and authentication functions. All cryptographic routines are executed on the secureAVR core which uses the AdvX accelerator during encryption/decryption. AdvX is based on a 32-bit technology, thus enabling fast computation and low power operation. AdvX supports standard finite fields arithmetic functions (including RSA, DSA and DH) and GF(2N) arithmetic functions (including ECC). An AES 128 Engine is provided as an optional feature. Additional security features include power, frequency and temperature protection logic, logical scrambling on program data and addresses, power analysis countermeasures, and memory accesses controlled by a supervisor mode. This product is specifically designed for Smart Cards and targets Access Control and ID applications. A block diagram of the AT90SC256144RCF is shown in Figure 1
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AT90SC256144RCFT
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AT90SC256144RCFT
Figure 1. AT90SC256144RCFT Contact/Contactless secureAVR Enhanced RISC Architecture
32KB ROM Cryptography
Data Bus 8-bit
144KB EEPROM User Memory + OTP 256KB ROM Program Memory 16 Instruction Register 16 Instruction Decoder 16
Access Control
RNG
CLK Secure Control GND VCC
PC
General Purpose Registers X Y Z 8 8
8KB RAM Data Memory Interrupt Unit ISO 7816 Controller ISO 7816 I/O Port 0
IN/OUT0
ALU 8
ISO 7816 I/O Port 1
IN/OUT1
Control Lines Status Register
ISO14443 Controller (CIC)
DMA Controller
Access Control
RF Modulator Power and Clock
RF1 RF2
Timers
DES / TDES
Reset Circuit
RST
AdvX
Crypto-Accelerator
DPA Counter Measures
CRC and Checksum Accelerator
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6534AS-SCIC-13Oct06

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